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Knights Landing: Intel & Micron Collab on Next Gen Xeon Phi

By - Source: Toms IT Pro

Intel released a few additional details regarding the company's reengineering of the next generation Xeon Phi chip, code named 'Knights Landing,' at the International Supercomputing Conference (ISC) taking place this week in Leipzig German. Specifics provided by Intel about the new architecture include the on-package integration of a new interconnect technology from Intel and, through Intel's collaboration with Micron, up to 16GB of on-package high-bandwidth memory.

Intel announced the company's roadmap for the next generation of the Xeon Phi processor at the Supercomputing Conference in November 2013. The company's plan, announced at the time, was to make the Knight's Landing 14nm chip available as a self-contained host processor that would improve system efficiency and accelerate compute processes.

Integrating features typically allocated to other hardware components (for example, co-processors using graphic processors (GPUs), networking, and memory) would reduce latency issues caused by the need to move data between the CPU and external components. Integrating more features could also have the added benefit of reducing power consumption and increasing system density.

As part of Intel's design of Knights Landing, the chip will eventually integrate Intel's newly announced Omni Scale Fabric, an end-to-end interconnect, into the next version of the Intel Xeon Phi chip as well as future generations of Intel's general purpose Xeon processors. Intel's Omni Scale fabric will include a line of adapters, edge switches, director switch systems, and open source fabric management and software tools. Micron's on-package memory will ship in 2 GB and 4 GB parts later this year.Micron's on-package memory will ship in 2 GB and 4 GB parts later this year.

Omni Scale Fabric has application compatibility with Intel's existing True Scale Fabric so customers will be able to switch to the new fabric technology without needing to change their applications. Omni Scale Fabric will initially be provided on a PCIe card and then be integrated into Knights Landing.

"Intel is re-architecting the fundamental building block of HPC systems by integrating the Intel Omni Scale Fabric into Knights Landing, marking a significant inflection and milestone for the HPC industry. Knights Landing will be the first true many-core processor to address today's memory and I/O performance challenges. It will allow programmers to leverage existing code and standard programming models to achieve significant performance gains on a wide set of applications. Its platform design, programming model and balanced performance makes it the first viable step towards exascale," said Charles Wuischpard, vice president and general manager of Workstations and HPC at Intel.

Intel will be including integrated memory in Knights Landing based on a collaboration between Intel and Micron. Micron's Hybrid Memory Cube (HMC) technology combines a (flat) stack of DRAM chips with a logic layer. Intel's Knights Landing CPU will incorporate a memory interface optimized for the HMC and will include up to 16GB of on-package memory. The integrated HMC is estimated to deliver up to 5 times the sustained memory bandwidth compared to DDR4 memory.

Conceptual layout of the announced processor package.Conceptual layout of the announced processor package."The ecosystem is changing and the importance of scalable on-package memory and memory bandwidth is now coming to light. Memory is at the heart of the solution space which will benefit both big compute and big data. This announcement is a clear validation of how Micron is advancing the role and impact of memory on systems and the value that 3D memory can deliver," said Chirag Dekate, Research Manager at IDC.

The next generation of Intel Xeon Phi chips are expected to be available to run HPC systems in the second half of 2015.

Images courtesy of Intel and Micron.